 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| Product Specification PE3512 Product Description The PE3512 is a high-performance static UltraCMOSTM prescaler with a fixed divide ratio of 4. Its operating frequency range is DC to 1500 MHz. The PE3512 operates on a nominal 3 V supply and draws only 8 mA. The input and output interfaces support both AC-coupled, low-Z RF as well as direct connection to low voltage positive logic devices. It is packaged in a small 6-lead SC-70 and is ideal for frequency scaling solutions The PE3512 is manufactured in Peregrine's patented Ultra Thin Silicon (UTSi(c)) CMOS process, offering the performance of GaAs with the economy and integration of conventional CMOS. 1500 MHz Low Power UltraCMOSTM Divide-by-4 Prescaler Features * DC to 1500 MHz operation * Fixed divide ratio of 4 * Low-power consumption: 8 mA typical @ 3V * RF or LV Digital Interface * Ultra-small package: 6-lead SC-70 Figure 1. Functional Schematic Diagram Figure 2. Package Type 6-lead SC70 D IN Pre-Amp Q D Q OUT Output Buffer CLK QB CLK QB Table 1. Electrical Specifications (ZS = ZL = 50 ) VDD = 3.0 V, -40 C TA 85 C, unless otherwise specified Parameter Supply Voltage Supply Current Input Frequency (Fin) Conditions Minimum 2.85 Typical 3.0 8 Maximum 3.15 12 1500 +10 Units V mA MHz dBm dBm dBm DC DC < Fin 1000 MHz -10 -3 2 Input Power (Pin) 1000 MHz < Fin 1500 Output Power (Pout) DC < Fin 1500 MHz Document No. 70-0107-03 www.psemi.com (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 8 PE3512 Product Specification Table 2. DC Electrical Characteristics (-40 C TA 85 C) Symbol VIH VIL VOH VOL Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Condition 2.7 V VDD 3.3 V 2.7 V VDD 3.3 V VDD = 2.7 V; IOH = 2.9 mA VDD = 2.7 V; IOL = 2.6 mA Typical 2.0 0.8 2.2 0.4 Unit V V V V Table 3. AC Characteristics (-40 C TA 85 C) Symbol tPHL tPLH tr tf Parameter Propagation Delay (High to Low) Propagation Delay (Low to High) Output Rise Time (10% to 90%) Output Fall Time (90% to 10%) Condition* 50 MHz Pulse Train Input; CL = 10 pF, RL = 500 50 MHz Pulse Train Input; CL = 10 pF, RL = 500 50 MHz Pulse Train Input; CL = 10 pF, RL = 500 50 MHz Pulse Train Input; CL = 10 pF, RL = 500 Typical 3.0 3.2 2.0 2.0 Unit ns ns ns ns * See figure 5 for AC test circuit Table 4. Typical Output Swing (VDD = 2.7 V) Frequency 50 MHz 500 MHz 1500 MHz Condition 200 mVp-p Sinusoidal Input; CL = 10 pF, RL = 500 200 mVp-p Sinusoidal Input; CL = 10 pF, RL = 500 200 mVp-p Sinusoidal Input; CL = 10 pF, RL = 500 Typical 2.3 2.2 1.7 Unit Vp-p Vp-p Vp-p (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 2 of 8 Document No. 70-0107-03 UltraCMOSTM RFIC Solutions PE3512 Product Specification Figure 3. Pin Configuration (Top View) Electrostatic Discharge (ESD) Precautions When handling this UltraCMOSTM device, observe the same precautions that you would use with other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rating specified in Table 6. Latch-Up Avoidance Unlike conventional CMOS devices, UltraCMOSTM devices are immune to latch-up. pin 1 NC GND IN 1 6 OUT GND VDD . 512 SC-70 2 5 3 4 Table 5. Pin Descriptions Pin No. 1 2 Pin Name N/C GND Device Functional Considerations Description No Connect. This pin should be left open. Ground pin. Ground pattern on the board should be as wide as possible to reduce Input signal pin. DC blocking capacitor Power supply pin. Bypassing is required. Ground pin. Divided frequency output pin. DC blocking 3 4 5 6 IN VDD GND OUT The PE3512 divides an input signal, up to a frequency of 1500 MHz, by a factor of four thereby producing an output frequency at one-fourth the input frequency. To work properly with low impedance, ground referenced interfaces, the input and output signals (pins 3 & 6) must be AC coupled via an external capacitor, as shown in the test circuit in Figure 4. The ground pattern on the board should be made as wide as possible to minimize ground impedance. See Figure 9 for a layout example. Table 6. Absolute Maximum Ratings Symbol VDD Pin TST TOP VESD Parameter/Conditions Supply voltage Input Power Storage temperature Operating temperature ESD voltage (Human Min Max 4.0 13 Units V dBm C C V -65 -40 150 85 2000 Absolute Maximum Ratings are those values listed in the above table. Exceeding these values may cause permanent device damage. Exposure to absolute maximum ratings for extended periods may affect device reliability. Document No. 70-0107-03 www.psemi.com (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 3 of 8 PE3512 Product Specification Figure 4. Test Circuit Block Diagram Spectrum Analyzer 1 N/C 2 GND 50 Ohm 100 pF VDD 3V +/- 0.15 V 100 pF 1000 pF 3 IN OUT 6 100 pF GND 5 VDD 4 50 Ohm PE3512 Signal Generator Figure 5. AC Test Circuit VDD Pulse Generator PE3512 CL RT RL RT = Zout of pulse generator (usually 50 ohm) (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 4 of 8 Document No. 70-0107-03 UltraCMOSTM RFIC Solutions PE3512 Product Specification Typical Performance Data: VDD = 3.0 V Figure 6. Input Sensitivity Figure 7. Device Current Figure 8. Output Power Document No. 70-0107-03 www.psemi.com (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 5 of 8 PE3512 Product Specification Evaluation Kit Evaluation Kit Operation The SC-70 Prescaler Evaluation Board was designed to help customers evaluate the PE3512 divide-by-4 prescaler. On this board, the device input (pin 3) is connected to connector J1 through a 50 transmission line. A series capacitor (C1) provides the necessary DC block for the device input. A value of 100 pF was used for this board layout; other applications may require a different value. The device output (pin 6) is connected to J3 through a 50 transmission line. A series capacitor (C5) provides the necessary DC block for the device output. This capacitor value must be chosen to have a low impedance at the desired output frequency of the device. A value of 100 pF was chosen for the evaluation board. At both input and output, select a capacitor value that offers low series reactance while ensuring that any parasitic resonances are well above the operating bandwidth. The board is constructed of a two-layer FR4 material with a total thickness of 0.031". The bottom layer provides ground for the RF transmission lines. The transmission lines were designed using a coplanar waveguide above ground plane model with trace width of 0.030", trace gaps of 0.007", dielectric thickness of 0.028", metal thickness of 0.0014", and r of 4.4. Note that the predominate mode of these transmission lines is coplanar waveguide. Liberal numbers of plated through holes unite the top and bottom ground areas for best performance. J6 provides DC power to the device via pin 4. Two decoupling capacitors (100 pF, 1000 pF) are included on this trace. It is the customer's responsibility to determine proper supply decoupling for their design application. Applications Support If you have a problem with your evaluation kit or if you have applications questions call (858) 731-9400 and ask for applications support. You may also contact us by fax or e-mail: Fax: (858) 731-9499 E-Mail: help@psemi.com Figure 9. Evaluation Board Layouts Peregrine Specification 101/0110 Figure 10. Evaluation Board Schematic Peregrine Specification 102/0190 (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 6 of 8 Document No. 70-0107-03 UltraCMOSTM RFIC Solutions PE3512 Product Specification Figure 11. Package Drawing 6-lead SC-70 1.80 2.20 0.65 BSC 0.10 0.30 1.80 2.40 1.15 1.35 0.15 0.30 0.10 0.40 0.10 0.18 0.80 1.00 0.80 1.10 0.00 0.10 Table 7. Ordering Information Order Code 3512-01 3512-02 3512-00 3512-51 3512-52 Part Marking 512 512 PE3512-EK 512 512 Description PE3512-06SC70-7680A PE3512-06SC70-3000C PE3512-06SC70-EK PE3512G-06SC70-7680A PE3512G-06SC70-3000C Package 6-lead SC-70 6-lead SC-70 Evaluation Kit Green 6-lead SC-70 Green 6-lead SC-70 Shipping Method 7680 units / Canister 3000 units / T&R 1 / Box 7680 units / Canister 3000 units / T&R Document No. 70-0107-03 www.psemi.com (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 7 of 8 PE3512 Product Specification Sales Offices The Americas Peregrine Semiconductor Corp. 9450 Carroll Park Drive San Diego, CA 92121 Tel 858-731-9400 Fax 858-731-9499 North Asia Pacific Peregrine Semiconductor K.K. 5A-5, 5F Imperial Tower 1-1-1 Uchisaiwaicho, Chiyoda-ku Tokyo 100-0011 Japan Tel: +81-3-3502-5211 Fax: +81-3-3502-5213 Europe Peregrine Semiconductor Europe Commercial Products: Batiment Maine 13-15 rue des Quatre Vents F- 92380 Garches, France Tel: +33-1-47-41-91-73 Fax : +33-1-47-41-91-73 Space and Defense Products: 180 Rue Jean de Guiramand 13852 Aix-En-Provence cedex 3, France Tel: +33(0) 4 4239 3361 Fax: +33(0) 4 4239 7227 South Asia Pacific Peregrine Semiconductor 28G, Times Square, No. 500 Zhangyang Road, Shanghai, 200122, P.R. China Tel: +86-21-5836-8276 Fax: +86-21-5836-7652 For a list of representatives in your area, please refer to our Web site at: www.psemi.com Data Sheet Identification Advance Information The product is in a formative or design stage. The data sheet contains design target specifications for product development. Specifications and features may change in any manner without notice. The information in this data sheet is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user's own risk. No patent rights or licenses to any circuits described in this data sheet are implied or granted to any third party. Peregrine's products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS is a trademark of Peregrine Semiconductor Corp. Preliminary Specification The data sheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. Product Specification The data sheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a DCN (Document Change Notice). (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 8 of 8 Document No. 70-0107-03 UltraCMOSTM RFIC Solutions |
Price & Availability of PE3512-EK
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |